Welcome to Pydrofoil's documentation!
=====================================

.. toctree::
   :maxdepth: 2
   :caption: Contents:


Pydrofoil is an experimental emulator-generator for ISA models written in
`Sail`__. It can generate emulators for RISC-V__, ARM__, CHERIoT__ based on
their respective Sail models. The Pydrofoil-generated emulators achieve fast
performance by doing dynamic binary translation (aka just-in-time compilation)
from guest instructions into host machine instructions. It's built on top of
the `RPython meta-jit compiler`__ and reuses all its optimizations, backends,
etc. Performance is typically an order of magnitude better than the emulators
generated by Sail.

To get started with the RISC-V emulator, please consult :doc:`building_pydrofoil`.

.. toctree::
   :maxdepth: 1
   :hidden:

    Building Pydrofoil <building_pydrofoil>
    Using Pydrofoil <using_pydrofoil>
    Developing Pydrofoil <developing_pydrofoil>
    Background: Optimizations <background_optimizations>
    Arm <arm>
    CHERIoT <cheriot>
    Useful links <useful_links>
    Changelog <changelog>

.. __: https://github.com/rems-project/sail
.. __: https://github.com/riscv/sail-riscv
.. __: https://github.com/rems-project/sail-arm
.. __: https://github.com/CHERIoT-Platform/cheriot-sail
.. __: https://www3.hhu.de/stups/downloads/pdf/BoCuFiRi09_246.pdf

..
    Indices and tables
    ==================

    * :ref:`genindex`
    * :ref:`modindex`
    * :ref:`search`